XPT4_3( Trigger crosspoint ) schematic page descriptions

Page1:  J1, J2 J0 and J3 connectors on back panel.
        Includes Geographic address pin logic, power regulators
        for -2V ECL Vtt and LEDs.
        In addition this page shows VME address and data bus 
        tranceivers/ buffers and the ID Prom.
        Finally it shows the triquint 16x16 crosspoint switch 
        here used as an 8x16 switch.  
        The 'ECL Buffers' block is shown expanded on page 1a
Note: This board needs the VME sysclk line on the backplane to exist.

Page 1a:  ECL 100314 buffers with all associated terminations and
         pulldowns for the input side of the crosspoint switch.

Page 1b: Expansion of 'Vme J1 bus' block from page 1.  Helps understand
         pinouts and connections to VME logic

Page2: VME interface based on PLX VME2000 chip with discrete address
        decoders for geographic address.
     
Page 3: XPT4_3 xilinx chips and eprom.  Both configured from the single
       prom.  The 4003A chip handles crosspoint configuration.
       The 4003H chip contains 16 registers for the settings of the 
       Elmec delay lines.  There are modern pin compatible replacement
       chips available should the need arise.

Page 4: TTL -> ECL converters for delay line values.  Interfaces between
        Xilinx 4003H and Elmec parts. 
Page 5: Extension of page 4

Page 6: Output section for TXPT.  Shows level shifting ( to PECL ) 
        and AMP optical output drivers.
Page 7: Extension of page 6
 
Page 8: Post crosspoint data path of TXPT.  Shows Differential to 
        single ended conversion, Elmec delay lines, and conversion 
        to differential again ( for optical drivers )
Page 9: Extension of page 8.  
--Thurston Chandler 9/98
  Yale CDF Group